I am a PhD student in the Electrical and Computer Engineering Department at North Carolina State University working for Prof. Gregory Byrd. My interests lie in multi-core architecture specially cache coherence, memory consistency models and syncronization semantics. I am currently in my final year and my research is on improving H/W semantics for lock-free programming. Additionally, I work as a Graduate Teaching Assistant with the ECE Department.
I graduated with a B.E. (Hons) in Electronics and Instrumentation from Birla Institute of Technology and Science, Pilani, India in 2011 and worked for 4 years in the electronics industry as a Physical Design (PD) and Static Timing Analysis (STA) Engineer with various companies starting at Texas Instruments, Bangalore. As a PD/ STA engineer, I worked on ARM Cortex-A series based SoCs driving design closure from synthesis to tape-out for various sub-blocks actively associated with layout and timing closure.