I am currently looking into intersection of hardware transactional memories (HTMs) and persistent memories. While both share very similar guarantees with respect to consistency, atomicity and durability, the optimal ways to achieve them while ensuring performance for both can be very different. For example, version management for HTMs using “undo” logging has less overhead and delivers performance where as persistent memories perform better with “redo” logging ( as implemented in DHTM). My current research interest is to look into these similarities and tailor methods for writing into persistent memory using well implemented HTM strategies.

Additionally, I am interested in advanced parallel architecture topics of coherency and consistency, synchronization and interconnect network and have been working with simulators like GEM5 and sniper in conducting preliminary experiments for my research.